This invention relates generally to a thin film transistor and more particularly to a thin film transistor applicable to, for example, active matrix liquid crystal displays and integrated circuit memories.
Conventional thin film transistors have a structure such as illustrated, for example, in JAPAN' DISPLAY 86, pages 196-199, published in 1986 and generally illustrated in FIG. 2A, which is a plan view of the structure and FIG. 2B is a cross sectional view taken along the line B-B' of FIG. 2A. The thin film transistor comprises an insulating substrate 201, e.g., glass, quartz or sapphire, and a source region 202 and a drain region 203, which are polysilicon thin films with impurities added to these films as donors or acceptors. A data line 204 and a pixel electrode 205 are in electrical contact respectively with the source region 202 and the drain region 203. A semiconductor layer 206, comprising, for example, a polysilicon thin film, is in electrical contact with both the upper surface of the source region 202 and the upper surface the drain region 203 and also extends between these regions 202 and 203. A gate insulating film 207 overlays all these components, and a gate electrode 208 is formed on gate insulating film 207.
FIG. 3 graphically illustrates the characteristics of a thin film transistor according to the structure shown in FIGS. 2A and 2B. The abscissa axis represents gate voltage, V.sub.gs, and the ordinate axis represents the logarithm of drain electrode, I.sub.d. The characteristics are for an n-type thin film transistor having a source/drain voltage of 4 V and channel length and channel width both of 10 .mu.m. The drain current, I.sub.d, when the gate voltage, V.sub.gs, is a negative value is expressed as the OFF current, I.sub.OFF, and the drain current, I.sub.d, which flows when the gate voltage V.sub.gs is positive is expressed as I.sub.ON. To be noted is that the drain current, I.sub.d, is at a minimum when the gate voltage is near zero volts. At a negative gate voltage, V.sub.gs, Hall current is produced increasing the OFF current, I.sub.OFF, as illustrated in FIG. 3, thereby significantly reducing the I.sub.ON /I.sub.OFF ratio. As a result, when this type of thin film transistor structure is utilized in an active matrix liquid crystal display, having a liquid crystal layer across which electrical charge is held, when the gate voltage of the transistor is decreased to zero or a negative value after electrical charges have been applied and accumulated relative to the liquid crystal layer, the continued maintenance of these accumulated electric charges, as applied, at a sufficient operating level is difficult due to an undesirably large OFF current condition resulting in overall deterioration of image quality is experienced in the liquid crystal display.
It is an object of this invention to overcome this difficulty by providing a thin film transistor that exhibits a large I.sub.ON /I.sub.OFF ratio.